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FPGADESIGNTOOL.COM - Site Information

fpgadesigntool.com   Aldec - Technologies - FPGA Project Management
FPGA & ASIC - Electronic Design Verification and Simulation Software for SystemC, VHDL, Verilog, SystemVerilog, Assertions, EDIF, MATLAB/Simulink
Fpgadesigntool.com

To improve performance of SITEINFO service and to prevent its excessive high-volume use by a single source, we implemented a randomly generated Access Code that must be entered before running a SITEINFO request.

Please enter the Access Code from the image field into the text field and then click the Continue button to proceed with your request.

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The Access Code in the box is provided in graphics format. It has letters which are generated randomly and the symbol images are distorted. The distorted symbols cannot be read by computer programs which are used for mass-collect email addresses and any customer information. Only humans can read the distorted symbols and pass the access code. The Access Code improves performance of our services. It prevents excessive high-volume use by a single source.

The services that require Access Codes are:

Whois – after entering the correct Access Code you can run 10 WHOIS requests before you will be prompted to enter a new Access Code.

Site Info – you can run 25 Site Info requests before you will be prompted to enter an Access Code.

Trace Route - you can run 20 Trace Route requests before you will be prompted to enter an Access Code.

RBL Check - you can run 20 RBL Check requests before you will be prompted to enter an Access Code.

What’s my IP - Access Code is not required for this service.


NOTE: We may modify Access Code policy at any time without notice on this web page.
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